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Patkar: “A Design Methodology for Optimally Folded, Pipelined Architectures in VLSI Applications using Projective Space Lattices”, accepted for publication in Elsevier Journal of Microprocessors and Microsystems 37 (6), 674-683, 2013 J- Yogesh Dilip Save, H. Patkar, “Solution of PDEs-Electrically Coupled Systems with Electrical Analogy.” Integration, the VLSI Journal 46 (4), 427-440, 2013 C- Prateek Saxena, Vinay B. Patkar, and Dinesh Sharma: “An Affordable on-site and Remote Laboratory Solution for a Course in Modern Digital Design”, accepted for publication in IEEE EDUCON, Berlin 13th-17th March 2013. Patkar, “FPGA Implementation of particle filter based object tracking in video”, 3rd International Symposium on Electronic System Design (ISED), Kolkata, 19th-22nd December 2012. Patkar, Rajbabu Velmurugan, and Preeti Rao, “A Remote Lab For Real-Time Digital Signal Processing”, EDERC2012: 5th European DSP Education and Research Conference, 13- 14 September 2012, Amsterdam, Netherlands C- Yogesh Dilip Save, H. Patkar, “Two Graph based cicuitsimulator for PDE –Electrical Analogy”, 25th Intl. Patkar, System for Error Control Coding using Expander-like codes constructed from higher dimensional Projective Spaces, and their Applications, Indian Patent Requested (2010), 2455/MUM/2010, (78 pages) C- Swadesh Choudhary, Tejas Hiremani, Hrishikesh Sharma and Sachin Patkar, “A Folding Strategy for DFGs derived from Projective Geometry based graphs”, The 2010 International Congress on Computer Applications and Computational Science (CACS 2010), Singapore, Dec 4-6, 2010 C- Subhendu Roy, Yogesh Dilip Save, H. Patkar, “Large Scale VLSI Circuit Simulation Using Point Relaxation”, CSC, 2010 (The 2010 International Conference on Scientific Computing), July 12-15, USA, 2010 J- V.
in proceedings of International Conference on VLSI Design, 2012 C- Madhumita Date, Sachin B.
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